From Orly Yadid-Pecht & al., “A random access photodiode array for intelligent image capture”, IEEE transactions on electron devices, vol. 38, no. 8, p.1772 (August, 1991) is known a sensor comprising a light detection unit, an information sampling and holding unit, and a reading unit. The light detection unit comprises a reverse-biased photodiode coupled in series with a reset transistor, which is coupled to a positive power supply. The connection point between the photodiode and the reset transistor is called the photodiode node. This photodiode node is coupled to a sample circuit. The output of the sample circuit is fed to a first terminal of a memory capacitor, of which the second terminal is tied to the ground. The first terminal of the memory capacitor is also connected to a read out circuit.
The processes of sensing and reading out are separated, i.e. the light sensing is periodical but reading can take place at any time. The memory capacitor in the pixel keeps a sampled value for additional readings in the same integration period. In order to enable simple application of multiple readings, buffers are provided. According to a preferred embodiment, a first buffer is placed between the photodiode and the memory capacitor, and a second buffer is placed between the memory capacitor and the reading unit.
This known active pixel has the disadvantage that, due to the presence of several transistors, more specifically the reset transistor, and each of the buffer transistors, there are different MOSFET threshold voltage drops in the circuit, which cause signal attenuation. In view of modern CMOS processes with low power supply voltages (3.3 V, 2.5 V, . . . ), the signal range is thereby greatly reduced. In a 0.5 μm CMOS process, the different threshold voltage drops lower the reset level at the output to about 0.5 V, leaving a difficult to use and not linear signal range of less than 0.5 V.